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The arm64 MMU backend invalidates a single virtual address from the TLB with invalidatetlbpage() in arch/arm64/core/mmu.c, which issued…

CVE-2026-79979

The arm64 MMU backend invalidates a single virtual address from the TLB with invalidatetlbpage() in arch/arm64/core/mmu.c, which issued TLBI VAE1{IS} with an operand of virt >> 12. That operand encodes the ASID in bits [63:48], so the invalidation only ever matched ASID 0 (the kernel page tables) and global entries. Memory domains, however, are allocated ASIDs starting at 1 in archmemdomaininit(), and every domain-private leaf created by privatemap() is mapped with MTNG, i.e. non-global. A domain's cached translation therefore survived the invalidation. All callers of invalidatetlbpage() are demand-paging paths. When the eviction algorithm reclaims a frame, pageframepreparelocked() in kernel/mmu.c calls archmempageout(), which marks the kernel leaf invalid, propagates the invalid descriptor into every domain via syncdomains(), and then flushes only ASID 0. dopagefault() immediately reuses the very same page frame for the incoming mapping through archmempagein(). A user thread that had already touched the evicted page — a kmempartition added with archmemdomainpartitionadd(), or its own stack mapped by mapthreadstack() — retains a valid EL0 read/write translation to that physical…

Assessment

CVSS
7.8 (v3.1)
Severity
High
EPSS
0.1% chance of exploitation in the next 30 days
Known exploited
Not listed in CISA KEV
Exploit availability
Nothing found in Exploit-DB, Metasploit, Nuclei or public PoC repositories
Published
23 October 2026
Last updated
26 October 2026
Affected
zephyrproject
Weakness
CWE-416
Assigner
vulnerabilities@zephyrproject.org

CVSS vectorCVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:H/A:H

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