The Renesas RA SCI UART driver's receive-error ISR, uartrascieriisr() in drivers/serial/uartrenesasrasci.c, acknowledged the error…
CVE-2026-90585
The Renesas RA SCI UART driver's receive-error ISR, uartrascieriisr() in drivers/serial/uartrenesasrasci.c, acknowledged the error condition only when a Zephyr interrupt-driven callback had already been registered. With CONFIGUARTINTERRUPTDRIVEN=y and CONFIGUARTASYNCAPI=n, if data->usercb is NULL the ISR body is empty: the SCI error flags (SSR.ORER, SSR.FER, SSR.PER) are left set and the ICU event flag RICU->IELSRb[eriirq].IR is never cleared, so the interrupt re-pends immediately and the ISR is re-entered without end. The error interrupt is masked at boot by uartrasciinit(), but FSP's RSCIUARTOpen() unconditionally re-enables it, and uartrasciconfigure() - the back end of the public uartconfigure() API, enabled by default via CONFIGUARTUSERUNTIMECONFIGURE - performs a Close()/Open() pair without re-masking it. Any runtime uartconfigure() therefore leaves the error interrupt live regardless of whether a callback has been set, as does calling uartirqerrenable() on its own. An instance used with the polling API, or the window between uartconfigure() and uartirqcallbackuserdataset(), thus runs with the error interrupt unmasked and no callback registered. The trigger is an ordinary…
Assessment
- CVSS
- 4.6 (v3.1)
- Severity
- Medium
- Known exploited
- Not listed in CISA KEV
- Exploit availability
- Nothing found in Exploit-DB, Metasploit, Nuclei or public PoC repositories
- Published
- 9 November 2026
- Last updated
- 9 November 2026
- Affected
- zephyrproject · Zephyr
- Assigner
- zephyr
CVSS vectorCVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:N/I:N/A:H
At the source
References
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